EJClaw 0588ee21ac feat(dashboard): per-stage STT/LLM/TTS timing + rename 두뇌 -> LLM ...

- voice_turn now records three separate timed steps (STT, LLM, TTS) instead of
  one combined "STT+두뇌+TTS" step, so each stage's latency shows in the turn.
- Rename 두뇌 -> LLM everywhere user-facing: component chip, sub header, demo
  banner, model label, brain-failure log, startup print, pipeline step name.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>

2026-08-27 00:03:34 +09:00

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